Thru-silicon vias for 3D WLP | IEEE Conference Publication | IEEE Xplore

Thru-silicon vias for 3D WLP


Abstract:

Thru-Silicon designs and manufacturing process flows are introduced as a means to produce 3D wafer level packaging solutions. Standard silicon IC manufacturing unit-proce...Show More

Abstract:

Thru-Silicon designs and manufacturing process flows are introduced as a means to produce 3D wafer level packaging solutions. Standard silicon IC manufacturing unit-processes must be combined into robust process-flows to allow for the rapid deployment of wafer-level packaging throughout the industry.
Date of Conference: 06-08 August 2000
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-930815-59-9
Conference Location: Braselton, GA, USA

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