1-Bit/2-Level Analog-to-Digital Conversion Based on Comparator and FPGA for Aperture Synthesis Passive Millimeter-Wave Imager

Interferometric aperture synthesis is a proven technique in radio astronomy and earth remote sensing, which also shows great potentials in security screening. An aperture synthesis passive millimeter-wave (PMMW) imager is under development at Beihang University, which is designed for concealed contraband detection on the human body in an indoor environment. This imager uses 256 antenna-receiver channels with 1 GHz bandwidth and can obtain a radiometric sensitivity less than 1 K at a video imaging rate (~25 frame/s). One of the greatest challenges in this system is the development of a digital correlation subsystem capable of analog-to-digital (A/D) conversion and subsequent signal processing among the system's 256 channels. In this paper, a comparator-based 1-bit/2-level (1B/2L) A/D conversion architecture is presented. The main error sources during sampling are identified as the timing error of sampling clocks and threshold offset of comparators and analyzed in detail. The sampled data are captured by field programmable gate arrays (FPGAs) to perform further signal processing, and a data capture module performing the serial-to-parallel conversion and per-bit deskew is designed in the FPGA to transfer sampled data from the sampling clock domain to the internal processing clock domain. A 64-channel test system is built to verify the design, and a correlation efficiency of 92.5% to 99.6% is observed at 1 GHz sampling frequency. It is found that the correlation efficiency degradation to less than 98% is caused by the threshold offsets of comparators which can be compensated using a digital-to-analog converter (DAC) or programmable potentiometer.