Scalable Modeling of Thermal Impedance in InP DHBTs Targeting Terahertz Applications

In this paper, we report a new scalable model for the thermal impedance of III-V DHBTs that has been developed based on the physics of heat diffusion within the HBT architecture. The heat flows through both the emitter metal layers and toward the substrate are taken into account for the model development. The model constitutes of individual thermal contributions of the different regions of the intrinsic device and metal layers. On-wafer low-frequency S-parameters measurements have been performed on several device geometries to study the device dynamic self-heating. The model has been validated against the measurements showing good accuracy and scalability. Time-domain pulse measurements have also been performed to correlate with the frequency domain S-parameter measurements.