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A - Time Correlated SPAD Image Sensor in 40-nm CMOS Technology | IEEE Journals & Magazine | IEEE Xplore

A 192\times128 Time Correlated SPAD Image Sensor in 40-nm CMOS Technology


Abstract:

A 192 \times 128 pixel single photon avalanche diode (SPAD) time-resolved single photon counting (TCSPC) image sensor is implemented in STMicroelectronics 40-nm CMOS ...Show More

Abstract:

A 192 \times 128 pixel single photon avalanche diode (SPAD) time-resolved single photon counting (TCSPC) image sensor is implemented in STMicroelectronics 40-nm CMOS technology. The 13% fill factor, 18.4\,\,\mu \text {m} \times 9.2\,\,\mu \text{m} pixel contains a 33-ps resolution, 135-ns full scale, 12-bit time-to-digital converter (TDC) with 0.9-LSB differential and 5.64-LSB integral nonlinearity (DNL/INL). The sensor achieves a mean 219-ps full-width half-maximum (FWHM) impulse response function (IRF) and is operable at up to 18.6 kframes/s through 64 parallelized serial outputs. Cylindrical microlenses with a concentration factor of 3.25 increase the fill factor to 42%. The median dark count rate (DCR) is 25 Hz at 1.5-V excess bias. A digital calibration scheme integrated into a column of the imager allows off-chip digital process, voltage, and temperature (PVT) compensation of every frame on the fly. Fluorescence lifetime imaging microscopy (FLIM) results are presented.
Published in: IEEE Journal of Solid-State Circuits ( Volume: 54, Issue: 7, July 2019)
Page(s): 1907 - 1916
Date of Publication: 03 April 2019

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