Analog EEPROM in standard process AMS 0.8 /spl mu/m CMOS

The design of a non-volatile analog memory is presented. The specificity of this memory lies in the fact that it is realized in standard AMS 0.8 /spl mu/m CMOS technology. The concept is based on the model of the floating gate transistor which sees its threshold voltage modified following the amount of carriers which are on its gate. The carrier injection physics rests on cold tunneling (Fowler-Nordheim effect).