Flow network modeling for improving flow distribution of microelectronics burn-in oven

Modern microelectronics, especially high performance microprocessors need to go through rigorous test and stressing to identify infant mortality failure. One of the stressing procedures is performed by running the devices at elevated temperature for prolonged period of time. With the ever faster microprocessor speed and device power, current burn-in solutions will not be enough to accommodate future generation of products. This study investigated the enhancement of local heat transfer by restricting open flow paths and redirection of cooling flow to the burn-in devices, through flow analysis with Flow Network Modeling software. A hierarchical modeling approach was used in which the flow characteristics of burn-in socket were derived, from which the burn-in board model was built, and a system level model was eventually assembled. Case study for a 3/spl times/5 burn-in board was conducted using Flow Network Modeling software and numerical results are presented.