Development and Implementation Experience of Microprocessor Emulators for Cyber-physical AVR Testing Complexes

The article outlines the main methodological aspects of creating digital models of automatic excitation regulator devices (AVR). Such digital models can be embedded in microprocessor-based devices for AVR simulation (emulators). The publication presents the effectiveness evaluation results of AVR microprocessor-based emulation, which are connected to the power system physical model (PSPM) of the JSC ?STC UPS?. PSPM is used for different tasks, ex. AVR testing. Verification of the developed AVR digital models (and emulators) was carried out in the course of laboratory experiments, which are aimed to determine the bode plots for AVR (and power system stabilizer) channels. The comparison tests lead to the following conclusion. The proposed approach can be used for physical AVR devices replacement in PSPM.The developed microprocessor system was implemented as a test bench and it has been successfully tested in PSPM-studies of real automatic regulators of domestic and foreign production.