A gm/ID Based Algorithm for the Design of CMOS Miller Operational Amplifiers in 65 nm Technology

Designing of analog circuits is a very difficult and tedious task even for experienced designers and it becomes complicated even further due to short-channel effects and low voltage supply brought by technology scaling. The emergence of Wireless Sensor Networks (WSNs) only strengthened the need for a faster and more efficient analog design process. The operational amplifier is one of the fundamental blocks for analog circuits and has many applications for different devices. This project presents a tool that will automatically size the components in a CMOS Miller operational amplifier based on the g
_m
/I
_D
methodology. The tool considers the intended application when handling the trade-offs regarding the characteristics of the amplifier. The considered applications are identified as comparator, filter, and preamplifier. The tool was successful in designing three amplifiers for each application. To further verify the functionality of the tool, a layout of the preamplifier design was created and tested to prove that the design stays within the required specifications.