Improving the Security of a 6T SRAM using Body-Biasing in 28 nm FD-SOI

Power analysis attacks have become a major threat to security systems by enabling secret data extraction through the analysis of the current consumed by the supply voltage. Embedded memories, implemented with 6T SRAM cells serve as key components of many security systems. However, the leakage current consumption of 6T SRAM cells is correlated with their stored data, resulting in susceptibility to leakage power analysis attacks. In this paper, we propose exploiting the body bias capabilities of FD-SOI technology to reduce the correlation between the consumed current and data stored in the memory by modifying the body voltage during runtime. Simulation results in 28nm FD-SOI technology demonstrate a significant reduction in the information leakage of a body-biased six-transistor (6T) static random access memory (SRAM) without additional area overhead.