Model and Experiments of Small-Size Vertical Devices With Field Plate

A small-size vertical device with field plate is designed and experimentally realized in this paper. The modulation effect of the field plate causes an enhanced bulk electric field (ENBULF) and improves the breakdown voltage VB. A 2-D electric field model is developed to give the ENBULF condition corresponding to the maximum VB and the optimal specific ON-resistance R
_ON
,
_sp
. Based on the model, the minimum figure of merit (FOM) (gate charge Q
_g
× ON-resistance R
_ON
) is discussed for a typical ENBULF device, i.e., the shield-gate vertical double diffused metal- oxide-semiconductor (SG-VDMOS). The calculated results are in good agreement with the simulations. Furthermore, a 35-V SG-VDMOS is analytically designed and experimentally implemented, which obtains a R
_ON
,
_sp
of 4.4 mQ · mm
²
and a gate to drain charge Q
_gd
of 11.3 nC, respectively. The experiment realizes the minimal FOM and a R
_ON
,
_sp
reduced by 28.6% when compared with the conventional “silicon limit.”