Signal Integrity Analysis of BMC Assisted Remote Debug Solution

In the 1980s, multi-layer circuit boards and non-lead-frame integrated circuits (ICs) were becoming standard and connections were being made between ICs that were not available to probes. The majority of manufacturing and field faults in circuit boards were due to poor solder joints on the boards, imperfections among board connections, or the bonds and bond wires from IC pads to pin lead frames. The Joint Test Action Group (JTAG) was formed in 1985 to provide a pins-out view from one IC pad to another so these faults could be discovered [1] [2].Nowadays, Intel server platforms provide two primary paths for debug - One is Intel In-Target Probe (Intel
^®
ITP) via on board eXtended Debug Port (XDP) and JTAG path for debug. The other is USB 3.0 hosted Direct Connect Interface (DCI) for closed chassis debug. Software developers and system level debuggers use either path to access internal resources and events to triage failures. But both approaches require close proximity to the failing server as the debug host with necessary software needs to be physically connected. Both ways are time-consuming and expensive for OEMs/ODMs engineers to debug a failing system once the system is far away from their company. To solve this problem and reduce debug time and cost, BMC Assisted Remote Debug Solution is proposed as a new choice.