Novel Dual Power-Mode CMOS Differential Power Amplifier Design Using Single Supply Voltage and a Compact Reconfigurable Output Combining Network

This paper presents a novel design of dual power-mode CMOS differential power amplifier (PA). Based on a single supply voltage and a newly developed reconfigurable output combining network, PA efficiencies are maximized in both highpower and low-power operation. For demonstration, the proposed PA with center frequency of 2 GHz is implemented using 0.35 μm CMOS process. Simulation results indicate that, a power-added efficiency (PAE) of 47.7% at 27.7 dBm (high power-mode), and 38.0% at 22.3 dBm (low power-mode) can be obtained.