High-density printed circuit board using B/sup 2/it/sup TM/ technology

We have developed the B/sup 2/it/sup TM/ printed circuit board, and presented a related paper entitled, A High-density substrate with buried bump interconnection technology, at the IMC meeting in April 1996. Since then, we have been applying this technology to a variety of boards, and report here, on the application of B/sup 2/it/sup TM/ to semiconductor packaging. The product has 0.1 to 0.2 diameter bumps (hereafter called fine bumps). To produce a multilayer high-density printed circuit board, we need to add conductive bumps to each layer over a base layer, which we call the en bloc laminating process. By repeating the en bloc laminating process multiple times, a multilayer stacked array can be fabricated. Signals can go down to internal layers directly from the surface pads via bumps, which is effective for a substrate such as a BGA type package. By using the B/sup 2/it/sup TM/ method, it is possible to omit the outerlayer plating process. This is a advantageous for fine line patterning, because the circuit can be patterned by etching the copper foil alone. We introduced two types of liquid photo resist process, one is the ED method, and the other is the liquid photo-resist process which uses a spin coater.