Postfault LVRT Performance Enhancement of DFIG Using a Stage-Controlled SSFCL-RSDR

To enhance the dynamic low-voltage ride-through (LVRT) performance of a doubly fed induction generator (DFIG) based wind turbine during the postfault stage, a novel LVRT scheme is proposed by integrating a stator-side superconducting fault current limiter (SSFCL) with a two-step rotor-side series dynamic resistor (RSDR). The basic principle, circuit modeling, and switching strategy of the SSFCL and RSDR are presented to form the primary and backup protection schemes. As compared to conventional SSFCL-based LVRT scheme, the results obtained in the proposed SSFCL-RSDR-based scheme show that the amplitudes of electromagnetic transient oscillations are largely reduced with shorter recovery time. This enhances significantly the internal and external LVRT behaviors in the DFIG during and after the fault simultaneously.