FPGA based point to point Data Transfer System with single clock signal synchronization

To build a point to point data transfer system with a configurable protocol, the FPGA devices are used as a cheaper alternative versus ASIC; especially if every data package must be synchronous with a single clock signal for both receiver and transmitter. A brief description of the desired system, hardware programming that rules the communication protocol, design and fabrication of the printed circuit board that makes possible the communication between two FPGA Mezzanine Card through SCSI cable and the final testing of the system, are the followed steps to perform this flexible and high velocity scientific research oriented system.