An Improved Physics-based LTSpice Compact Electro-Thermal Model for a SiC Power MOSFET with Experimental Validation

A compact electro-thermal SiC Power MOSFET model implemented in LTSpice is presented in this paper. A 1200 V, 90A CREE SiC power MOSFET (C2M0025120D) has been used in this work to illustrate the parameter extraction and experimental model validation. The dynamic validation has been shown using a double-pulse test circuit. The convergence has been tested with the 4-switch topology of an inverter and a comparison between MAST, Verilog-A and CREE's empirical model of the same device has also been presented.