A 140 nW, 32.768 kHz, 1.9 ppm/°C Leakage-Based Digitally Relocked Clock Reference with 0.1 ppm Long-Term Stability in 28nm FD-SOI

The design of Ultra-Low Power clock reference systems with highly energy-efficient operations is a key concept to achieve autonomous Internet-of-Things applications. In this work, a System-on-Chip is presented, embedding an area-efficient ultra-low voltage clock reference generator built on a digitally controlled leakage-based Ring Oscillator. Through a relocking scheme using a 2
²²
Hz external quartz reference, an associated digital compensation circuit ensures a stable output frequency of 32.768 kHz over inherent Process, Voltage and Temperature variations. The whole design has been fabricated in 28 nm FD-SOI technology and operates at a fixed supply voltage V
_dd
of 0.5 V. By combining Ultra-Low Power techniques, a 15 nW power consumption is achieved for the Oscillator and 125 nW for the digital compensation. The circuit area of the proposed clock source is 56.2 μm x 29.1 μm. A 90 ppm/V voltage accuracy has been measured over 10 packaged dies for V
_dd
± 8%. A temperature accuracy of 1.9 ppm/°C is also reported from 0 °C to 50 °C. Lastly, the long-term frequency stability is characterized by an Allan deviation floor of 0.1 ppm.