Research of Special Instructions for Finite Field X Multiplications of Cryptographic Algorithms

High-performance and flexible finite field X multiplications special instructions targeted at cryptographic algorithms processing are proposed in this paper, in order to dispel the performance bottleneck of X multiplications realized by RISC and VLIW universal processors. Through analyzing the processing characteristics of X multiplications in different cryptographic algorithms, the proposed x
^k
multiplication instructions can support different processing data widths (8 bits, 16 bits, 32 bits, 64 bits, 128 bits), different k values (1~8), and instruction parallelism based on VLIW and operating several small data width at the same time are also designed with parallelism of 4, 2, 1 respectively. Furthermore, expanded X multiplication instructions are exploited to support the execution of each instruction forcefully too. The X multiplications special instructions designed can be used as ameliorative instructions for RISC and VLIW universal processors to advance the performance of cryptographic algorithms.