Transparent redundancy in the time-triggered architecture

The time-triggered architecture is an architecture for distributed embedded real-time systems in high dependability applications. The core element of the architecture is the time-triggered communications protocol TTP/C. This paper shows how TTP/C can be extended by a fault-tolerance layer that performs those functions that are necessary for the implementation of application redundancy. The hardware/software interface of the host computer where the application software is executing, is not changed, neither in the value domain, nor in the temporal domain, by this implementation of fault-tolerance in the communications system. Provided the application software has been properly organized it is thus possible to implement application redundancy transparently, i.e., without any modification of the function and timing of the application system. The paper also discusses the experiences gained from a prototype implementation of the fault-tolerance layer in the microprogram of a TTP/C controller chip.