A CMOS charge pump for low voltage operation

This paper proposes a low-voltage, high performance charge pump circuit suitable for implementation in standard CMOS technologies. The proposed charge pump utilises the cross-connected NMOS, voltage doubler, as a pumping stage. For low-voltage operation, where the performance of the NMOS is limited due to body effect, PMOS are used to increase the pumping gain. Simulations at 50 MHz have shown that for power supply voltages of 2 V, 1.5 V, 1.2 V and 0.9 V an output voltage of 11.5 V, 8.4 V, 6.5 V and 4 V can be generated respectively, using five pumping stages.