A family of redundant multipliers dedicated to fast computation for signal processing

In view of the performance achieved through the use of the redundant addition, it would appear interesting to generalize the redundant notations (Carry Save, Borrow Save). To achieve this we require, as well the addition, a multiplication satisfying these notations. This paper presents the design of a set of multipliers spanning all possible I/O combinations, in redundant and conventional notations. We also describe the associated architectures and details of our method, which is based on parameterizable IP cores. The functions developed offer superior performance over conventional multipliers.