Digital Calibration of Low-Voltage and Low-Power Analog ICs

In this paper, a digital calibration method for analog integrated circuits in nanotechnologies is proposed. Calibration was applied to a variable-gain amplifier (VGA), and it was aimed at the input offset voltage. The first part of the paper brings motivation for our research. Consequently, fundamentals of the proposed method and its implementation in 130 nm CMOS technology node are explained. The whole system operates with the supply voltage of 0.6 V. Then, verification results obtained mainly by simulations and partly obtained by the measurement of prototype chips. In all simulations, Monte Carlo analysis was used in the temperature range from -20°C to 60°C. With the use of calibration, the input offset voltage distribution mean value ranges between 299μVto 413μV, and standard deviation ranges between 356μV - to 802μV. The measurement results of the VGA without calibration shows, that input offset voltage distribution over 60 samples reaches mean value of 403μV and standard deviation of 3.45 mV.