A Fast Scrubbing Method Based on Triple Modular Redundancy for SRAM-Based FPGAs

In recent years, SRAM-based FPGAs (Field Programmable Gate Arrays) have been popular in space applications because of their high speed and reconfigurability. The specific structure cell SRAM (Static Random Access Memory) not only speed up the user design but also speed up the configuration and reconfiguration. However, SRAM is very sensitive to the space particles that can change the value stored in SRAM. For improving the reliability of user design in SRAM-based FPGA, this paper proposes a scrubbing method based on TMR (Triple Modular Redundancy) for SRAM-based FPGAs. This method improves the reliability of TMR design by reducing the possibility of SEUs accumulation. We test the proposed scrubbing method through fault injection and the experimental results indicate the proposed scrubbing method can improve the reliability of TMR design in SRAM-based FPGAs.