FPGA Implementation of LSTM Based on Automatic Speech Recognition

Automatic speech recognition(ASR) remains very popular research area in recent years. Long Short-Term Memory(LSTM) is always used in speech recognition and demonstrated state-of-art accuracy. The high performance LSTM models is becoming increasing demanding in terms of computational and memory load. FPGA-based accelerators have attracted attention of researchers because of its high energy-efficiency and great flexibility. The main work of this paper is an efficient FPGA implementation of LSTM to accelerate the ASR algorithm. The proposed circuit is implemented at Zedboard 100 MHz. The amount of parameters are reduced more than 7 times because of compression method.