Ultra-Low-Standby Power 6T Single-port and 8T Dual-port SRAMs on 65 nm Silicon-on-Thin-Box (SOTB) for Smart IoT Applications

In 65-nm Silicon-on-Thin-Box (SOTB) technology, we demonstrate fully functional embedded 6T single-port (SP) SRAM and 8T dual-port (DP) SRAM for Smart Internet-of-Things (IoT) applications. By using back-bias (BB) control in the sleep mode, 13.72 nW/Mbit (25.85 nW/Mbit) ultra-low standby power for SP (DP) SRAM is observed. Both are reduced to 1/1000 compared to the normal standby mode. The measured read access time of 128-kb SP (32-kb DP) SRAM with forward BB is 1.84 ns (1.64 ns) at 1.0 V overdrive and 25°C, which is over 2.5× (2.75×) faster than that of normal mode at 0.75 V with zero BB. Besides, inherent read/write disturbance issues in DP SRAM are also evaluated by test chips, confirmed there are no issues.