Area Optimization for FPRM Circuit Based on BDD

BDD (Binary Decision Diagram) is a data structure that can graphically represent digital circuit. By optimizing BDD's structure, an area optimization method for FPRM (Fixed Polarity Reed-Muller) circuit based on improved BDD has been proposed. First, we optimized BDD's structure of the original circuit, then extracted all paths where the BDD node is "1", then calculated the corresponding coefficients of FPRM expansion through these paths, and finally used genetic algorithm (GA) to find the best polarity when area is minimum. Comparison with existing tabular technique and disjoint products method, results of some MCNC benchmarks show that this method not only has high processing efficiency, but also achieves a smaller FPRM area.