Design and Test of a Planarized High Power Density 100 kW SiC Traction Inverter with 1kV DC-Link

A SiC MOSFET based 1kV DC-link planarized traction inverter is designed to achieve high power density and high common mode noise immunity of the gate driver. To achieve high power density, a planarized structure is adopted to reduce the overall height of the whole system. Significantly, PCB based busbar, gate driver planar transformer and shunt-based current sensor are the main concepts for planarized inverter design. Moreover, a split gate driver concept is used to shrink the overall size of inverter and reduce driving loop inductance as well. An optimized planar transformer winding layout has been used to reduce the coupling capacitance between primary and secondary side in order to achieve high common mode noise immunity. The inverter is designed for 100kW continuous power and has been tested with a novel closed-loop high power circulating strategy that requires only a small rating DC power supply. Testing results verify the design concepts and the high performance of the traction inverter.