Comparison of On-Wafer TRL Calibration to ISS SOLT Calibration With Open-Short De-Embedding up to 500 GHz

Sub-mm circuit design requires accurate on-wafer characterization of passive and active devices. In industry, characterization of these devices is often performed with off-wafer short-open-load-thru (SOLT) calibration. In this paper, the validity of this characterization procedure above 110 GHz is investigated by an exhaustive study of on-wafer and alumina off-wafer calibration using measurement and electromagnetic (EM) simulation up to 500 GHz. The EM simulation is performed at two different levels, first at the intrinsic level of the devices under test for reference and afterward up to the probe level to simulate different standards used in the off-wafer calibration or in the on-wafer calibration in the presence of the probe. Furthermore, EM simulation data are calibrated with the same procedures and tools that are used in the measurement; therefore, it includes the probe-to-substrate coupling. In addition, precise EM model of a commercial impedance standard substrate is developed and used to perform the SOLT calibration. A good agreement is observed between measurement and EM modeling for the off-wafer calibration as well as for the on-wafer calibration. Results clearly highlight a limitation of alumina off-wafer methodology above 200 GHz for characterization of silicon-based technologies. Finally, a discussion is given on the pros and cons of the off-wafer and on-wafer methodologies.