Formal Verification of Datarace in Safety Critical ARINC653 compliant RTOS

Safety properties of a real time embedded system must be verified throughout the execution trace of the system. Formal verification through model checking complements the conventional testing. We propose a technique for verification of datarace in the kernel library of an ARINC 653 based safety critical real time operating system. The property to be verified is specified in-terms of linear temporal logic formula. We also define a methodology to model the kernel of a real time operating system with two level scheduling viz. partition level and process level.