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Well-Posed Verilog-A Compact Model for Phase Change Memory | IEEE Conference Publication | IEEE Xplore
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Well-Posed Verilog-A Compact Model for Phase Change Memory


Abstract:

In this work, we demonstrate a well-posed compact model for phase change memory (PCM) devices based on Ge2 Sb2 Te5, (GST) chalcogenide. This model supports all modes of s...Show More

Abstract:

In this work, we demonstrate a well-posed compact model for phase change memory (PCM) devices based on Ge2 Sb2 Te5, (GST) chalcogenide. This model supports all modes of simulation including transient, DC, and AC. The model is developed in Verilog-A and simulated using HSPICE. It is computationally simple and successfully captures the key high level behaviors of memory switching, including the resistance dependence on programming voltages, currents and pulse time-scales.
Date of Conference: 24-26 September 2018
Date Added to IEEE Xplore: 29 November 2018
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Conference Location: Austin, TX, USA

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