Work-in-Progress: WinoNN: Optimising FPGA-based Neural Network Accelerators using Fast Winograd Algorithm

In this paper, we present WinoNN, which utilizes fast Winograd algorithm to optimize FPGA-based neural network accelerators. In particular, Winograd algorithm effectively reduces the resource occupation of FPGA, as well as boosts the system speedup, especially for embedded and mobile devices. The main contributions of this paper include implementation of single-channel convolution module, implementation of multi-channel convolution module, deployment and performance test on FPGA hardware platform. We use LeNet-5 as a case study, which demonstrates the performance of WinoNN is significantly better than the general ARM Cortex A series processors.