FPGA-Based Adaptive Task Scheduler for Real Time Embedded Systems

Present invention provides FPGA based Adaptive Scheduler for Real Time System. In the proposed scheme of implementing concurrent architecture for scheduling different task, two concurrent scheduling is observed through round robin technique and the prioritized services are executed. The implementation of the architecture using Field Programmable Gate Array greatly optimizes the constraints like Power, Time, Area and Hardware Resource Utilization and etc. It is proven for development of Efficient and Secured Templates. To demonstrate the performance of the system, traffic light system is implemented considering emergency traffic handling, density based traffic handling and routine traffic handling. At the inside of the system the concurrent status of the service requests raised by different task and from different directions, internal flag register is maintained which indicates the status of the service requests. Based on the status of the internal flag register, service to the request and time allocation is decided adaptively and intelligently. The said architecture has wide applications in Encryption, Decryption, Image Processing, Signal Processing, Secured Wireless Sensor Network, Cloud Computing, Error Correction and Detection Modules and etc. To prove robustness of the architecture, system is first logically tested using Modelsim Simulator and then implemented using variants of Field Programmable Gate Arrays of Xilinx.