An Efficient Design for Canny Edge Detection Algorithm Using Xilinx System Generator

Digital Image consists of some informative pixels and some redundant pixels. Edge Detection is the process of preserving informative pixels and eliminating redundant data which improves bandwidth and storage efficiency. A sudden change in pixel intensity level is defined as an Edge. Theoretically, from the literature it is seen that Canny edge detection is the most accurate algorithm. It is also insensitive to Noise. The only disadvantage of Canny algorithm is its high computational complexity which limits its maximum frequency of application with high latency and low throughput. In this paper, tradeoff between Accuracy and Complexity is studied. An efficient Canny algorithm is designed using Xilinx System Generator which utilizes JTAG Hardware co-simulation approach. An accuracy is compromised in order to make it more efficient in terms of resource utilization than the conventional one. Spartan-3E FPGA is used as a reconfigurable hardware platform for the designed algorithm.