MOS Device Technology using Alternative Channel Materials for Low Power Logic LSI

CMOS utilizing alternative channel materials such as Ge and III-Vs on Si substrates is strongly expected for high performance and low power logic devices using nano-sheet/nano-wire structures in the future technology nodes. Also, tunneling-FETs (TFETs) using Ge/III-V materials are regarded as one of the most important steep slope devices for the ultra-low power applications. In this paper, we address the current status and key issues of CMOS and TFETs using alternative channel materials such as Ge, III-V and oxide semiconductors. Viable device and process technologies for realizing these devices are presented and discussed on a basis of our recent research activities.