A wet process to fabricate silicon oxide layer for through-silicon-via insulator application

Through-Silicon-Via (TSV) is a crucial technique for packaging in 3D integration, and the insulation layer to prevent the diffusion of Copper is also critical to TSV reliability and performance. To achieve a low-cost, simple method to fabricate SiO
₂
insulation layer at the room temperature, porous silicon(PS) precursor is brought in. Silicon porous precursor layer with different thickness is thus made, and horizonal diffusion and vertical diffusion are respectively found in thin layer and thick layer. In TSV application, under 50V oxidation voltage, a uniform TSV silicon oxide insulation layer can be fabricated with a good step coverage of 67.8%.