Deposition and Etch Process Equipment Capabilities for Embedded STT MRAM

Improvements in PVD Deposition and Etching of perpendicular MTJ stacks, to enable embedded STT MRAM are presented. Some developments in area of high temperature data retention and barrier reliability are highlighted using electrical results of integrated MTJ arrays with cell pitch of 130nm to 200nm. Equipment capabilities used to achieve these results are described, including volume manufacturing considerations. Further scaling in terms of etching of dense MTJ arrays are also discussed, using the novel etch process developed at Applied Materials [1]. Critical to device reliability is having a high breakdown voltage of the MgO barrier. By optimizing the RF MgO deposition process, high BDV > 1.5V was obtained for RA ~10 Ohms-um2 bottom pinned perpendicular MTJ Stack as shown in Fig. 1. In addition, by using a novel etch process, MTJ arrays with CD of 40-60nm and with <;200nm pitch were fabricated that can withstand >350C BEOL process temperatures as shown in Figure 2. Finally MTJ arrays with average coercivity of > 3kOe were demonstrated indicating strong PMA achieved for high temperature data retention.