Complete Charge Recovery Diode Free Adiabatic Logic

The proposed logic uses both the input and its complement to evaluate the output while ensuring zero nonadiabatic losses through the use of a pair of Transmission Gate like structures. The logic ensures that the operation of charging and discharging is done adiabatically. The use of Transmission Gate like structures further ensures the reduction in adiabatic losses and delay. Simulations have been performed on the proposed circuit based inverter using TANNER EDA TOOL in 180nm technology. The proposed circuit shows significant energy saving in comparison to available DFAL.