Design Optimization of CMOS Thermoelectric Energy Harvester for High Thermoelectric Efficiency

This paper presents a design study of the optimization of Complementary Metal Oxide Semiconductor (CMOS) thermoelectric energy harvester (TEG). This paper discusses the impact on the output by changing the geometric parameters of the device like thickness, length and structure of the cavity. Design and analysis of the structure was carried out using ANSYS Multiphysics software. Simulation result reveals that the change in geometric parameters has a significant effect on output voltage, output current, power and heat absorbed by heat sink. It is also shown that thermoelectric efficiency of the device can be improved by proper design of the structural parameters of the model.