Performance analysis of PLL components in digital synchronization systems for high-speed applications

The paper presents an analysis of circuit solutions and the results of circuit simulation of one of the options for building a phase-locked frequency (PLL) system containing the following components: phase detector, voltage-controlled oscillator and low-pass filter. All components of the PLL system are implemented within the framework of classical CMOS technology and circuitry. The proposed solutions for CMOS transistors with submicron design standards allow to achieve a significant increase in operating frequencies.