Universal and Convenient Optimization Strategies for Three-Terminal Memristors

Neuromorphic computing, i.e., brainlike computing, has attracted a great deal of attention because of its exceptional performance. For the hardware implementation of neuromorphic systems, the desired key building blocks, artificial synapses, have been intensively investigated recently. However, many issues, such as the small state number, low reliability, and high energy consumption, have complicated the path to real applications. Therefore, methods that can improve the performance of the artificial synapses are highly desired. Although different artificial synapses have diverse working mechanisms, universal optimization strategies that can be applied to most three-terminal field-effect-transistor-type artificial synapses are proposed in this paper. Instead of wasting the third terminal in the device structure, the working condition can be effectively tuned by this third terminal. The key parameters, such as the gate electric field intensity and distribution, can be adjusted, and the performance is thereby tuned. In this manner, multiple performance metrics are optimized, such as the current change per pulse (
$\Delta \text{I}$
), the linearity, the uniformity, and the power consumption. The mechanisms behind these strategies are also investigated to strengthen the effectiveness. This paper will push the performance of the current artificial synapses to a new level.