ADC and PLL for Optical Sensors in Depth and Virtual Reality Augmented Reality Applications

In this article a successive approximation register (SAR) analog-to-digital converter (ADC) and phase locked loop (PLL) implemented in tsmc 0.18-um CMOS process is presented for optical sensors in depth camera through virtual reality (VR) and augmented reality (AR) applications. By applying Vcm-based switching method that reduces switching power of the DAC, the proposed SAR ADC with phase locked loop design uses less capacitor in the DAC array. The proposed PLL with a complementary crossed-couple LC-tank voltage- controlled oscillator (VCO) and a mixed design of current mode logic (CML) and true single phase clock (TSPC) logic in the frequency divider.