A Semi-Floating Gate Transistor With Enhanced Embedded Tunneling Field-Effect Transistor

With the continuous semiconductor device scaling and the boosting of transistor density, it has become more and more important to design and realize novel paradigms of miniaturized electronic devices. A planar semi-floating gate transistor employs an embedded tunneling field-effect transistor for gate charging and discharging. U-shape semi-floating gate transistor uses a recessed trench to increase the channel length of the device. In this letter, we report the application of high-
$k$
/metal gate in the transistor replacing the polysilicon control gate and SiO
₂
dielectric. The process and device characteristics have been theoretically studied and the simulation work has been carried out using Sentaurus TCAD tools. This transistor can be operated at lower voltages and higher writing, and erasing operation speed has been achieved. The device power consumption has been successfully reduced.