Yield Approximation of Analog Integrated Circuits Under Time-Dependent Variability

In this paper an approximation technique for the time-dependent yield of analog integrated circuits is presented. Due to the interaction of aging effects and process variations the yield approximation in early design stages can become very time consuming and hampers the quantity of explorative analysis. The here proposed method is based on the pre-computed analyses of basic analog blocks and uses the small signal behavior in order to approximate the yield. The method is evaluated at the example of a two-stage Miller-OTA.