Warpage Analysis with Newly Molding Material of Fan-Out Panel Level Packaging and the Board Level Reliability Test Results

In recent years, new packaging process which employs a large panel format instead of wafer level supports so-called Fan-Out Panel Level Package (FOPLP) is attracting great attention in order to improve production efficiency of Fan-out Wafer Level Package. FOPLP and an ordinary Printed Circuit Board (PCB) manufacturing requires similar size of substrate panels therefore FOPLP possibly reduces the initial investment cost of package manufacturing because production lines of PCB can be partially "reused". We previously reported a new series of molding material which can obtain dramatically reduced panel warpage without highly filling silica particles in the molding layer. Here a part of rigid molecular structure of an epoxy resin, which is one of the main components in the molding material, is replaced to relatively softer and more flexible molecular chain in incremental steps. Resulting set of epoxy resin and molding compounds including each of them showed strong stress relaxation at glass transition temperature, the panel warpage was reduced to one fifth by specific viscoelasticity that was shown in master curve. These newly developed materials, in spite the fact that they all possess low glass transition temperature, showed excellent adhesion (i.e. die shear strength) against silicon surface of above 50 N at 250 degree C (chip size of 5 x 5 mm2) and high thermal resistance proven by small enough weight loss (<; 5 %) upon 390 degree C. In addition, package level tests such as a reflow test after the JEDEC Moisture Sensitivity Level 2 (85 degree C, 60 %R.H. for 168 hours), Temperature Cycle Test under the JEDEC condition B (-55/+125 degree C for 2000 cycles) and board level test were performed. Those demonstrated much enough reliability of our new molding materials on semiconductor packaging.