Advances in Memory Die Stacking

NAND flash memory continues to be a major growth and technology driver in semiconductor packaging. The need for ever-greater memory in thin packages is pushing die thickness to below 25um and die-attach film to 5um. Packages with 16 and 32 layers of stacked die are common-place and 64-die stacks are ramping up for production. The extremely high manufacturing volumes of these devices demand high speed assembly. With die sizes of about 10 × 15mm, the aspect ratio of size to thickness is about 500, making the process of picking die from the film frame one of the key challenges for achieving high-speed production at high yield and high volume. This paper presents the latest technology developments in thin die stacking with particular emphasis on the thin die pick process. Kulicke and Soffa pioneered the separation of the pick and place processes onto separate mechanisms in a die bonder almost 10 years ago. This machine architecture enables higher throughput by allowing pick and place operations to take place in parallel, while also allowing independent optimization of pick and place tools. Three of the most commonly used die ejection technologies are considered: multi-step, slider and our proprietary piston ejector. The die peeling method of all three is studied using a quasi-static finite element model, which is then extended to a full dynamic model for the piston ejector. The dedicated pick and place mechanism of the PTP architecture supports the use of a hot bond tool without adverse effects on the pick process. We discuss the concept of a heated bond tool, which allows for smaller temperature differences in the place process as die stacks become taller and the top die is further removed from the substrate heat.