Impact of Different Gate Biases on Irradiation and Annealing Responses of SiC MOSFETs

The irradiation and postirradiation annealing responses of SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) are investigated under the application of different positive gate biases. During irradiation, the threshold voltage of the SiC MOSFETs showed a negative shift under the application of a positive gate bias. However, a significant reduction in this shift was observed as the positive gate bias increased from 20 to 24 V. The postirradiation annealing of the irradiated SiC MOSFETs was performed under various positive gate biases over the range from 32 to 44 V. A rapid reduction in the number of oxide-trapped charges was observed. These results indicate that the degradation of the threshold voltage in irradiated devices can be inhibited by the application of a higher gate voltage, while the high positive gate bias annealing represents an efficient way to recover the threshold voltage shift in these devices.