Novel Programmable Package-level Thermal Evaluation System

Thermal management of semiconductor chips/systems is a very critical topic. In this paper, we describe a programmable evaluation system that can be used to evaluate the thermal aspects of semiconductor chips from initial chip planning/design stage to deployment on a customer board and beyond. The center of this system is a specially designed in-house semiconductor chip which can mimic many different use cases of a real product before product silicon is available. This is possible because of the unique programmability of this chip. The details of its architecture, implementation, operation, programming aspects, usage model and applications are described in this paper. In addition, the thermal evaluation methodology applicable to package development process is covered. This chip was fabricated in 0.18um technology, packaged as flip-chip and tested. It has a simple implementation and is easy to program and use - yet has substantial thermal evaluation capabilities. The usage model includes the following: · Modelling thermal behavior of semiconductor chips in development, with respect to architecture/floorplan · Cross-calibrating thermal numerical simulators against chip-level measurement data · Evaluation of thermal interface materials and form-factors for package development · Studying empirical power maps of customer use cases to evaluate cooling solutions The chip has ability to do automated on-chip measurements through a test-friendly interface and has been tested on a simple and inexpensive test-platform. Silicon measurement data and comparison to simulation results based on numerical models are presented. It is concluded that this evaluation vehicle can play a significant role in the thermal evaluation/management of a semiconductor chip throughout its development cycle - architecture/floorplanning, cooling solutions, package development, package pre-qualification (reliability) and customer use-case evaluations.