A robust 8F/sup 2/ ferroelectric RAM cell with depletion device (DeFeRAM)

This paper describes an area-penalty-free, leakage-compensated, and noise-immune 8F/sup 2/ cell design suitable for high-density, low-power ferroelectric RAM (FeRAM) generations. The new concept features a 1T1C ferroelectric memory cell containing an additional depletion device (DeFeRAM) controlled by the passing word line in a folded bit-line architecture. The depletion device permits the use of a common cell plate at intermediate voltage level. A highly reliable three-level word-line driver circuit design is discussed.