Optimisation of an Integrated Bidirectional Interleaved Single-Phase Power Factor Corrector

This paper presents a design methodology for a full-bridge interleaved bidirectional Power Factor Corrector (PFC) converter. It applies to converters with off-the-shelf components and/or PCB-integrated passive and active components. The procedure is implemented after selection of the topology and the modulation principle. The procedure includes a selection of semiconductor based on losses calculation, EMI filter design including the impact of cell shading and inductor design. The lowest volume is found with Zero Voltage Switching (ZVS) along a complete grid period in Continuous Current Mode (CCM) at fixed switching frequency. This is usually obtained with variable switching frequency such as Discontinuous Current Mode (DCM) or Triangular Current Mode (TCM). Moreover, the paper shows that interleaving enhances efficiency and power density by sharing losses and reducing EMI filter size. A pareto front in the efficiency (eta) vs power density (rho) domain is derived to define the final result.