Optimal design of a wideband 10GHz LC-VCO with small KVCo variation in 0.13um GSMC CMOS process

A Wideband 10GHz LC Voltage Controlled Oscillator (LC-VCO) with small K
_VCO
variation implemented on GSMC 0.13um CMOS process is presented. The proposed LC-VCO uses 4 bits Digital Control Capacitor Array (DCCA) technology to achieve a wideband frequency tuning range. This work also applies varactor arrays with different bias voltage instead of single varactor to improve the tuning linearity. The post-layout simulation shows that the output frequency covers 9.678-10.976GHz, corresponding to 12.57%, phase noise of -110.43dBc/Hz at 1MHz offset from 9.75GHz and phase noise of -107.14dBc/Hz at 1MHz offset from 10.6GHz, the power consumption of core circuit is 4.2mW under 1.2V power supply. The LC-VCO exhibites K
_VCO
variation of only 29.76% which reflected a good tuning linearity. The layout design is embed in a Frequency Synthesizer (FS) based Charge Pump Phase locked Loop (CPPLL) to tape out.